One goal of a communication system is to transport information from one physical location to another. In most electronic communication systems, the communication itself takes place between electronic components. Often, these electronic components are integrated circuits (“ICs”) and this communication setting is referred to as “chip-to-chip communication.” The communicating electronic components might be located in the same apparatus, such as the communication between a central processing unit (“CPU”) and memory inside a computer, tablet computing device, or other mobile device. Another example is the communication between two CPU cores that are integrated on the same chip. Yet another example is the communication between a Graphics Processing Unit (“GPU”) and memory on a graphics card. In these cases, the actual communication takes place over wires on a printed circuit board (“PCB”) and/or metal wires integrated in a chip and these wires carry electrical signals. It should be apparent upon reading this disclosure that other possibilities exist. The communication may, for instance, take place wirelessly or over an optical fiber.
In some case, communication takes place between components that are located in different apparatuses. An example of this situation is a digital photo camera that is connected to a computer. In this setting, the communication takes place over a physical cable or wirelessly. Another example is a set of computers that are connected to a network. The electronic components on the network card of each computer communicate with the electronic components of another network card of yet another computer.
In all these communication settings, a goal is to transmit digital information from one electronic component to another in a reliable and efficient way. The efficiency of the communication can be expressed in terms of the time it takes to transfer certain amount of information (speed), the energy that is required to transmit the information reliably (power consumption) and the number of wires per bit that is required for communication (pin-efficiency). In most systems, several trade-offs exist between these parameters and, depending on the application, some of these parameters may be more important than others. A good example is the communication between a CPU and a memory in a mobile device. A battery feeds a mobile device and the power consumption of the communication between the CPU and memory has a large impact on the battery life. When the device is wall-plugged, power consumption may be less of an issue, but the design needs to deal with the unplugged environment.
In most chip-to-chip communication systems communication takes place over a plurality of wires to increase the aggregate bandwidth. A single or pair of these wires may be referred to as a channel or link and multiple channels create a communication bus between the electronic components.
The difficulty in designing high speed, low power and pin-efficient chip-to-chip communication systems lies in part in the fact that the communication channel is not perfect. First, the physical wires will disturb the signals transmitted on them and noise and interference will be added to the transmitted signals. Second, the electronic components used to implement the communication system are not perfect and this disturbs the signals used for communication.
There are several typical sources of noise in chip-to-chip communication systems. First, there is noise and interference that is common to a set of wires. This type of noise and interference is called common-mode noise. Second, there is thermal noise that is induced in electrical conductors. Thermal noise is often well modeled as Gaussian noise that is superimposed to each conductor independently. Third, there is simultaneous switching output (“SSO”) noise that is caused by a time-varying current in the electronics that drive the wires. Fourth, the signals transmitted on different wires may interfere with one other, which causes crosstalk and severely degrades signal integrity especially at high speeds. Fifth, for some signaling methods an absolute voltage or current reference is required at the receiver. Such references are hard to make precisely and any errors in the reference may cause unwanted distortions and noise.
Many conventional chip-to-chip communication systems employ differential signaling to solve several of these issues related to noise. A typical chip-to-chip communications system based on differential signaling comprises multiple links and an example of such a system with n links is shown in FIG. 1. As shown there, a first IC 110 communicates with a second IC 120 over a bus 130 comprising 2n wires 135. The two chips may be located in two different devices or may be located in the same device. In the latter case, the two chips may be mounted on the same PCB or may be integrated in the same package or even on the same die. The latter is often referred to as “on-chip communications.” The IC 110 employs a set of n transceivers 140 that implement differential signaling. At the other end of the bus 130, the IC 120 employs another set of n transceivers. The i-th transceiver in IC 110 is connected by two wires to the i-th transceiver in IC 120.
FIG. 2 illustrates, at a high-level overview, a transmitter and a receiver that implement differential signaling. As shown there, communication takes place over a bus 130 comprising two wires. At the transmitter, a driver 210 drives the two wires of the bus and produces a signal 220 that is denoted by s0 for the first wire and a signal 230 that is denoted by s1 for the second wire. The signals may correspond to a physical voltage across the wires of the bus or a current through the wires of the bus. At the receiver side, the bus is terminated by a resistor 240. A differential receiver 250 senses the voltage across the termination resistor 240. In differential signaling, these signals satisfy s0=−s1 and it is known to one of skill in the art that this gives differential signaling its excellent properties with respect to common-mode noise, SSO noise and crosstalk. A major disadvantage of differential signaling is that it requires two wires for every signal that is to be transmitted on the communication bus. The pin-efficiency of differential signaling is only one half. Furthermore, a substantial amount of transmitter power is required to operate a bus communication system based on differential links.
Some solutions to these problems are taught by Cronie I, showing, among other things, a method to increase the pin-efficiency of chip-to-chip communication systems to a number close to, but smaller than one. The signaling methods disclosed in Cronie I preserve the properties with respect to common-mode noise, SSO noise and interference when implemented properly, but sometimes a greater pin-efficiency is desired. To further increase the pin-efficiency while maintaining good noise resilience, one can use methods disclosed in Cronie II.
Several embodiments described in Cronie II use spherical codes for chip-to-chip communication. Other embodiments in Cronie II are more specific and involve group codes, and teach to use a particular type of group codes called permutation modulation codes for chip-to-chip communications. In their original form, permutation modulation codes were known. [Slepian] suggested the use of such codes for transmission of information on communication channels in which signals are disturbed by Gaussian noise. Cronie II contains some examples of permutation modulation codes applied to chip-to-chip communication, and teaches how to achieve pin-efficiencies of one or larger using such techniques. However, some applications might be improved or require additional simplification and/or an even further reduction of chip-to-chip communication systems power consumption based on permutation modulation codes.
The methods disclosed in [Chiarulli] lead to a signaling scheme with the properties of differential signaling and an increased pin-efficiency compared to differential signaling. However, the resulting pin-efficiencies are substantially less than one and the methods disclosed in [Chiarulli] only lead to moderate improvements in power consumption. Furthermore, encoding and decoding complexity is an issue for the methods disclosed in [Chiarulli].
In [Poulton], a specific variant of a permutation modulation code is disclosed. However, a major downside of the methods disclosed in [Poulton] is the complexity of the circuitry required for encoding and decoding at the transmitter and receiver side. Furthermore, the scheme does not lead to improvements in power consumption and is only useful to improve upon the pin-efficiency, as pointed out in [Poulton]. Furthermore, the invention disclosed in [Poulton] is only useful for a relatively small number of bus wires (e.g., less than six) due to the complexity of encoding and decoding of the codes.
What is therefore needed are improved methods for chip-to-chip communications that result in a high pin-efficiency, have good resilience against different noise types present in chip-to-chip communications and are efficient in terms of the power consumption of the transmitter and receiver.